Digital Design Using Veriloghdl

Digital Design using VerilogHDL: VLSI Modeling, Coding and Verification covers the concepts of digital logic design, including, logic simplification and optimization for digital circuit synthesis and implementation, design and integration of logics (combinational and sequential) in the building of digital circuits and systems, the practical aspects of number systems, the use of VerilogHDL in the logic design, testbench verification, and the synthesis of digital circuits and systems with HDL code examples. Users will find an approach to the design, integration, verification, and synthesizing of a digital logic circuit, complete with coding examples.

Shilpi Birla, PhD is an Associate Professor in the Electronics & Communication Department at Manipal University Jaipur. She has over 15 years of teaching and industrial experience. Professor Birla completed her PhD in Low Power VLSI Design, and her research interests include Low Power VLSI Design, Memory Circuits, Digital VLSI Circuits, Nanodevices and Image Processing. She has authored more than 60 research papers in journals of repute and international conferences. She has organized several workshops in HSPICE, TCAD and XILINX, Summer internships in Diode Fabrication and Faculty Development Programs. She has acted as Session Chair, conference steering committee member, editorial board member, and reviewer in international IEEE journals and conferences. She has guided many M. Tech Students and PhD students in the course of her career and is a senior member of IEEE.