Negative Capacitance Field Effect Transistors

Physics, Design, Modeling and Applications. 1. Auflage. 7 schwarz-weiße und 63 farbige Abbildungen, 5 schwarz-weiße und 56 farbige Fotos, 2 schwarz-weiße und 7 farbige Zeichnungen, 8 schwarz-weiße Tabellen. Sprachen: Englisch
eBook (epub), 148 Seiten
EAN 9781000933338
Veröffentlicht Oktober 2023
Verlag/Hersteller Taylor & Francis eBooks
65,49 inkl. MwSt.
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Beschreibung

This book aims to provide information in the ever-growing field of low-power electronic devices and their applications in portable devices, wireless communication, sensor, and circuit domains. Negative Capacitance Field Effect Transistors: Physics, Design, Modeling and Applications discusses low-power semiconductor technology and addresses state-of-the-art techniques such as negative capacitance field effect transistors and tunnel field effect transistors. The book is split into three parts. The first part discusses the foundations of low-power electronics, including the challenges and demands and concepts such as subthreshold swing. The second part discusses the basic operations of negative capacitance field effect transistors (NCFETs) and tunnel field effect transistors (TFETs). The third part covers industrial applications including cryogenics and biosensors with NC-FET. This book is designed to be a one-stop guide for students and academic researchers, to understand recent trends in the IT industry and semiconductor industry. It will also be of interest to researchers in the field of nanodevices such as NC-FET, FinFET, tunnel FET, and device-circuit codesign.

Portrait

Prof. Young Suh Song is assistant professor in department of Computer Science (CS) at Korea Military Academy. His current research interests have included semiconductor reliability (self-heating effect and retention characteristics), AI semiconductor, NAND Flash and NOR Flash, low temperature logic device for CPU, low power logic device (Tunnel FET, TFET) for cell phone and laptop, and germanium (Ge) based logic device (2030 ~ 2050) which is one of the promising candidates for replacing current silicon (Si) based CPU technology. He has authored and co-authored over 40 research papers in journals and conferences including IEEE Transactions on Electron Devices (IEEE TED), IEEE Journal of the Electron Devices Society (IEEE JEDS), IEEE International Reliability Physics Symposium (IEEE IRPS), and IEEE Electron Devices Technology and Manufacturing (IEEE EDTM). He served as technical committee in IEEE International Conference on Circuits, Systems and Simulations (IEEE ICCSS), in 2022. He has also served as guest speaker in the universities including VIT-AP University and VIT-Chennai UNIVERSITY (India), in 2022. He received the "Best Paper" Award from "the Institute of Electronics and Information Engineers (IEIE)" in 2021 and "IEEE ICCSS" in 2022. Dr. Shubham Tayal is Assistant Professor in the Department of Electronics and Communication Engineering at SR University, Warangal, India. He has more than 6 Years of academic/research experience of teaching at UG and PG level. He has received his Ph.D in Microelectronics & VLSI Design from National Institute of Technology, Kurukshetra, M.Tech (VLSI Design) from YMCA university of Science and Technology, Faridabad and B.Tech (Electronics and Communication Engineering) from MDU, Rohtak. He has qualified GATE (2011,2013,2014) and UGC-NET (2017). He has published more than 30 research papers in various International journals and conferences of repute and many papers are under review. He is on the editorial and reviewer panel of many SCI/SCOPUS indexed international journals and conferences. Currently, He is editor/co-editor of 7 books in total from CRC Press (Taylor & Francis Group, USA) and Springer Nature. He acted as keynote speaker and delivered professional talks on various forums. He is a member of various professional bodies like IEEE, IRED etc. He is on the advisory panel of many international conferences. He is a recipient of Green ThinkerZ International Distinguished Young Researcher Award 2020. His research interests include simulation and modelling of Multi-gate semiconductor devices, Device-Circuit co-design in digital/analog domain, machine learning and IOT. Dr. Abhishek Kumar Upadhyay obtained Ph.D. degree in Electrical Engineering from the Indian Institute of Technology (IIT), Indore, M.P., India, in 2019. After getting his Ph. D, he worked for one year as a Postdoctoral Fellow in the Model Group, Material to System Integration Laboratory, University of Bordeaux, France. Then after working as Staff Scientist in the Chair of Electronics devices and Integrated Circuits, at Technische Universität Dresden, Germany for two years. Currently, he is working as R&D Engineer in X-FAB GmbH Dresden, Germany. He is the author of several research articles published in IEEE, Elsevier, Springer, Taylor & Francis, etc. Dr. Shiromani Balmukund Rahi received B.Sc. (Physics, Chemistry & Mathematics) in 2002, M.Sc. (Electronics) from Deen Dyal Upadhyaya Gorakhpur University, Gorakhpur in 2005, GATE (2009), M. Tech. (Microelectronics) from Panjab University Chandigarh in 2011 and Doctorate of Philosophy in 2018 from Indian Institute of Technology, Kanpur, India. He has completed his master project (M.Sc.) in Central Electronics Engineering Research Institute (CEERI, 2005), Pilani Rajasthan, under supervision of Dr P C Panchariya (director and Chief Scientist, CEERI, Pilani) and master thesis (M. Tech.) under Prof. Renu Vig (director and Professor, UIET Panjab University Chandigarh). For his doctoral thesis research, he has worked on challenging tasks in advanced semiconductor devices as well as Cloud adoption model for modern semiconductor industry under guidance with Dr B. Ghosh and Dr S.C. Misra (Professor, IIT K). He is working in Mahamaya College of Agriculture Engineering and Technology Akabarpur Ambedkar Nagar Uttar Pradesh affiliated to Narendra Dev University of Agriculture and Technology Uttar Pradesh, India. He has worked as reviewers for various journals, Transactions on Electron Device (IEEE), Journal of Nanoelectronics and Optoelectronics (American Scientific Publishers), Chinese Physics B (IoP science), Applied Physics A (Springer), Turkish Journal of Electrical Engineering & Computer Sciences, Microelectronic Engineering (Elsevier), Indian Journal of Physics (Springer), International Journal of Circuit Theory and Applications (Wiley Online Library), Silicon (Springer), Electron Device Letters (IEEE), Semiconductor Science and Technology (IoPscience). He has successfully published 15 research papers, 1 Conference Proceedings (Springer), 3 book chapters reputed publications. He has also attended and presented his research work in various international conferences and workshops. His Ph.D. research work was identified as best thesis, global dentification and shortlisted for Dr Shankar Dyal Sharma award in 2018 in Indian Institute of Technology Kanpur India. He has received various reviewer awards/reconizations such as IEEE Golden Reviewers (2018), AIP Advances (2020), International. Journal of Circuitry Theory and Applications, Wiley (2020). He is also jointly working with Professor S.C Misra (Indian Institute of Technology Kanpur India) for the development of IoTs for smart applications and Dr Naima Guenifi (LEA Electronics Department, University Mostefa Benboulaid of Algeria) for the development of ultra-low power devices such as Tunnel FETs and Negative Capacitance FETs.

Inhaltsverzeichnis

Part 1: Foundations of Low Power Electronics. 1. Recent Challenges in IT and Semiconductor Industry: From Von Neumann Architecture to the Future. 2. Technical Demands of Low-Power Electronics. 3. Negative capacitance Field Effect Transistors: Concept and Technology. Part 2: Negative Capacitance Field Effect Transistor. 4. Basic Operation Principle of Negative Capacitance Field Effect Transistor. 5. Basic Operational Principle of Anti-ferroelectric Materials and Ferroelectric Materials. 6. Basic Operation Principle of Optimized NCFET: Amplification Perspective. 7. Spin Based Magnetic Devices With Spintronics. Part 3: Industrial Application. 8. Mathematical Approach for Future Semiconductor Roadmap. 9. Mathematical Approach for Foundation of Negative Capacitance Technology.

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